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Features
* * * * *
Supply Voltage up to 40V Operating Voltage VS = 5V to 18V Typically 10 A Supply Current During Sleep Mode Typically 40 A Supply Current in Silent Mode Linear Low-drop Voltage Regulator: - Normal Mode: VCC = 5V 2%/50 mA - Silent Mode: VCC = 5V 7%/50 mA - Sleep Mode: VCC is Switched Off VCC Undervoltage Detection with Reset Output NRES (10 ms Reset Time) Voltage Regulator is Short-circuit and Over-temperature Protected LIN Physical Layer According to LIN Specification Revision 2.0 Wake-up Capability via LIN Bus (90 s Dominant) TXD Time-out Timer (9 ms) 60V Load-dump Protection at LIN Pin Bus Pin is Overtemperature and Short-circuit Protected versus GND and Battery High EMC Level 5V CMOS-Compatible I/O Pins to MCU ESD HBM 6kV at Pins LIN and VS Interference and Damage Protection According to ISO/CD7637 Package: SO8
* * * * * * * * * * * *
LIN Bus Transceiver with Integrated Voltage Regulator ATA6620 Preliminary
1. Description
ATA6620 is a fully integrated LIN transceiver, designed according to the LIN specification 2.0, with a low-drop voltage regulator (5V/50 mA). The combination of voltage regulator and bus transceiver makes it possible to develop simple, but powerful, slave nodes in LIN Bus systems. ATA6620 is designed to handle the low-speed data communication in vehicles (for example, in convenience electronics). Improved slope control at the LIN driver ensures secure data communication up to 20 kBaud with an RC oscillator for the protocol handling. The bus output is designed to withstand high voltage. Sleep mode (voltage regulator switched off) and Silent mode (communication off; VCC voltage on) guarantee minimized current consumption.
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Figure 1-1.
Block Diagram
VCC
ATA6620
Receiver Normal and Pre-normal Mode
1
VS
RXD
5
4 Filter
LIN
VCC Wake-up Bus Timer TXD 6 TXD Time-out Timer Slew Rate Control Short Circuit and Overtemperature Protection
8 Sleep Mode VCC Undervoltage Reset Switched Silent Mode Off Voltage Regulator 5V/50 mA/7% Normal Mode Voltage Regulator 5V/50 mA/2%
VCC
EN
2
Control Unit
7
NRES
GND
3
2. Pin Configuration
Figure 2-1. Pinning SO8
VS EN GND LIN 1 2 3 4 8 7 6 5 VCC NRES TXD RXD
Table 2-1.
Pin 1 2 3 4 5 6 7 8
Pin Description
Symbol VS EN GND LIN RXD TXD NRES VCC Function Battery supply Enables Normal mode if the input is high Ground LIN bus line input/output Receive data output Transmit data input Output undervoltage reset, low at reset Output voltage regulator 5V/50 mA
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3. Functional Description
3.1 Supply Pin (VS)
LIN operating voltage is VS = 5V to 18V. An undervoltage detection is implemented to disable transmission if VS falls below 5V, in order to avoid false bus messages. After switching on VS, the IC starts with the Pre-normal mode and the voltage regulator is switched on (that is, 5V/50 mA output capability). The supply current in Sleep mode is typically 10 A and 40 A in Silent mode.
3.2
Ground Pin (GND)
The IC is neutral on the LIN pin in case of GND disconnection. It is able to handle a ground shift up to 3V for supply voltage above 9V at the VS pin.
3.3
Voltage Regulator Output Pin (VCC)
The internal 5V voltage regulator is capable of driving loads with up to 50 mA, supplying the microcontroller and other ICs on the PCB. It is protected against overload by means of current limitation and overtemperature shut-down. Furthermore, the output voltage is monitored and will cause a reset signal at the NRES output pin if it drops below a defined threshold Vthun.
3.4
Undervoltage Reset Output (NRES)
This push-pull output is supplied from the VCC voltage. If the VCC voltage falls below the undervoltage detection threshold of Vthun, NRES switches to low after tres_f (Figure 4-6 on page 9). Even if VCC = 0V the NRES stays low, because it is internally driven from the VS voltage. If VS voltage ramps down, NRES stays low until VS < 1.5V and then becomes highly resistant. The implemented undervoltage delay keeps NRES low for tReset = 10 ms after VCC reaches its nominal value.
3.5
Bus Pin (LIN)
A low-side driver with internal current limitation and thermal shutdown, as well as an internal pull-up resistor according to LIN specification 2.0 is implemented. The voltage range is from -27V to +60V. This pin exhibits no reverse current from the LIN bus to VS, even in the case of a GND shift or VBatt disconnection. The LIN receiver thresholds are compatible with the LIN protocol specification. The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are slope controlled. The output has a short-circuit limitation. This is a self-adapting current limitation; that is, during current limitation, as the chip temperature increases, the current decreases.
3.6
Input Pin (TXD)
This pin is the microcontroller interface to control the state of the LIN output. TXD must be pulled to ground in order to drive the LIN bus low. If TXD is high or unconnected (internal pull-up resistor), the LIN output transistor is turned off and the bus is in the recessive state.
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3.7
Dominant Time-out Function (TXD)
The TXD input has an internal pull-up resistor. An internal timer prevents the bus line from being driven permanently in the dominant state. If TXD is forced to low longer than TDOM > 4 ms, the LIN bus driver is switched to the recessive state. To reset this dominant time-out mode, TXD must be switched to high (>10 s) before normal data transmission can be started.
3.8
Output Pin (RXD)
This pin reports the state of the LIN bus to the microcontroller. LIN high (recessive state) is reported by a high level at RXD; LIN low (dominant state) is reported by a low level at RXD. The output has an internal pull-up structure with typically 5 k to VCC. The AC characteristics are measured with an external load capacitor of 20 pF. The output is short-circuit protected. In unpowered mode (that is, VS = 0V), RXD is switched off.
3.9
Enable Input Pin (EN)
This pin controls the operation mode of the interface. After power up of VS (battery), the IC switches to Pre-normal mode, even if EN is low or unconnected (internal pull-down resistor). If EN is high, the interface is in Normal mode. A falling edge at EN while TXD is still high forces the device to Silent mode. A falling edge at EN while TXD is low forces the device to Sleep mode.
4. Mode of Operation
Figure 4-1. Mode of Operation
Unpowered Mode VBatt = 0V
b a a: VS > 5V b: VS < 4V c: Bus wake-up event
Pre-normal Mode VCC: 5V/2%/50 mA with undervoltage reset b Communication: OFF c
b
EN = 1 Go to silent command EN = 0 TXD = 1 Local wake-up event Normal Mode EN = 1 VCC: 5V/2%/50 mA with undervoltage reset Communication: ON EN = 0 TXD = 0 Go to sleep command Sleep Mode VCC: switched off Communication: OFF c b Silent Mode VCC: 5V/7%/50 mA with undervoltage reset Communication: OFF
Local wake-up event EN = 1
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Table 4-1.
Mode of Operation Pre-normal Normal Silent Sleep
Mode of Operation
Communication OFF ON OFF OFF VCC 5V 5V 5V 0V RXD 5V 5V 5V 0V LIN Recessive Recessive Recessive Recessive
4.1
Normal Mode
This is the normal transmitting and receiving mode of the LIN Interface, in accordance with LIN specification 2.0. The VCC voltage regulator operates with a 5V output voltage, with a low tolerance of 2% and a maximum output current of 50 mA. If an undervoltage condition occurs, NRES is switched to low and the ATA6620 changes state to Pre-normal mode. All features are available.
4.2
Silent Mode
A falling edge at EN while TXD is high switches the IC into Silent mode. The TXD Signal has to be logic high during the Mode Select window (Figure 4-2 on page 6). For EN and TXD either two independent outputs can be used, or two outputs from the same microcontroller port; in the second case, the mode change is only one command. In Silent mode the transmission path is disabled. Supply current from V Batt is typically IVSsi = 40 A with no load at the VCC regulator. The overall supply current from VBatt is the result of 40 A plus the VCC regulator output current IVCCs. The 5V regulator is in low tolerance mode (4.65V to 5.35V) and can source up to 50 mA. In Silent mode the internal slave termination between pin LIN and pin VS is disabled to minimize the power dissipation in case pin LIN is short-circuited to GND. Only a weak pull-up current (typically 10 A) between pin LIN and pin VS is present. The Silent mode voltage is sufficient to run an external microcontroller on the ECU, for example in Power Down mode. The undervoltage reset is VCCthS < 4.4V. If an undervoltage condition occurs, NRES is switched to low and the ATA6620 changes state to Pre-normal mode. A falling edge at pin LIN followed by a dominant bus level maintained for a certain time period (Tbus) results in a remote wake-up request. The device switches from Silent mode to Pre-normal mode, then the internal LIN slave termination resistor is switched on. The remote wake-up request is indicated by a low level at pin RXD to interrupt the microcontroller. (Figure 4-5 on page 8) With EN high, ATA6620 switches directly from Silent to Normal mode.
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Figure 4-2.
Switch to Silent Mode
Normal Mode Silent Mode
EN
TXD
Mode select window
Td = 3.2 s NRES
VCC
LIN
Delay time silent mode Td_sleep = maximum 20 s LIN switches directly to recessive mode
Figure 4-3.
LIN Wake-up Waveform Diagram from Silent Mode
Pre-normal Mode Normal Mode
LIN Bus
RXD
Low or floating Bus wake-up filtering time Tbus
Low
VCC Silent mode Pre-normal mode Normal mode
Regulator Wake-up Time EN Node ln silent mode
EN High
NRES
If undervoltage switch to pre-normal mode
Undervoltage detection active
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4.3 Sleep Mode
A falling edge at EN while TXD is low switches the IC into Sleep mode. The TXD Signal has to be logic low during the Mode Select window (Figure 4-4 on page 8). We recommend using the same microcontroller port for EN as for TXD; in this case the mode change is only one command. In Sleep mode the transmission path is disabled. Supply current from V Batt is typically IVSsleep = 10 A. The VCC regulator is switched off; NRES and RXD are low. The internal slave termination between pin LIN and pin VS is disabled to minimize the power dissipation in case pin LIN is short-circuited to GND. Only a weak pull-up current (typically 10 A) between pin LIN and pin VS is present. A falling edge at pin LIN followed by a dominant bus level maintained for a certain time period (Tbus) results in a remote wake-up request. The device switches from Sleep mode to Pre-normal mode. The VCC regulator is activated and the internal LIN slave termination resistor is switched on. The remote wake-up request is indicated by a low level at pin RXD to interrupt the microcontroller. (Figure 4-5 on page 8) With EN high you can switch directly from Silent to Normal mode. In the application where the ATA6620 supplies the microcontroller, the wake-up from Sleep mode is only possible via pin LIN.
4.4
Pre-normal Mode
At system power-up the device automatically switches to Pre-normal mode. The voltage regulator is switched on (VCC = 5V/50 mA) (see Figure 4-4 on page 8) after typically tVCC = 1 ms. The NRES output switches to low for tres = 10 ms and sends a reset to the microcontroller. LIN communication is switched off, and the undervoltage detection is active. A power-down of VBatt (VS < 4V) during Silent or Sleep mode switches into Pre-normal mode after powering up the IC.
4.5
Unpowered Mode
If battery voltage is connected to the application circuit (Figure 4-6 on page 9), the voltage at the VS pin increases due to the block capacitor. When VS is higher than the VS undervoltage threshold, VSth, the IC-mode changes from Unpowered to Pre-normal mode. The VCC output voltage reaches nominal value after tVCC. This time depends on the VCC capacitor and the load. NRES is low for the reset time delay tReset; no mode change is possible during this time.
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Figure 4-4.
Switch to Sleep Mode
Normal Mode Sleep Mode
EN
Mode select window TXD Td = 3.2 s NRES
VCC
LIN
Delay time sleep mode Td_sleep = maximum 20 s LIN switches directly to recessive mode
Figure 4-5.
LIN Wake-up Diagram from Sleep Mode
Pre-normal Mode Normal Mode
LIN Bus
RXD
Low or floating Bus wake-up filtering time Tbus
Low
On state Off state Regulator wake-up time EN High EN Node in sleep mode Reset time NRES Low or floating Microcontroller start-up time delay
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Figure 4-6. VCC Voltage Regulator: Ramp Up and Undervoltage
VS
12V
5.5V 3V
VCC
5V Vthun
NRES
5V
TVCC
Tres
Tes_f
5. Fail Safe Features
* During a short circuit at LIN, the output limits the output current to IBUS_LIM. Due to the power dissipation, the chip temperature exceeds TLINoff and the LIN output is switched off. The chip cools down and after a hysteresis of Thys, switches the output on again. During LIN overtemperature switch-off, the VCC regulator works independently. * There are now reverse currents < 3 A at pin LIN during loss of VBatt or GND. This is optimal behavior for bus systems where some slave nodes are supplied from battery or ignition. * During a short circuit at VCC, the output limits the output current to IVCCn. Because of undervoltage, NRES switches to low and sends a reset to the microcontroller. The IC switches into Pre-normal mode. If the chip temperature exceeds the value TVCCoff, the VCC output switches off. The chip cools down and after a hysteresis of Thys, switches the output on again. Because of Pre-normal mode, the VCC voltage will switch on again although EN is switched off from the microcontroller.The microcontroller can then start with normal operation. * Pin EN provides a pull-down resistor to force the transceiver into recessive mode if EN is disconnected. * Pin RXD is set floating if VBatt is disconnected. * Pin TXD provides a pull-up resistor to force the transceiver into recessive mode if TXD is disconnected.
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6. Voltage Regulator
The voltage regulator needs an external capacitor for compensation and to smooth the disturbances from the microcontroller. It is recommend to use an electrolytic capacitor with C > 1.8 F and a tantalum capacitor with C = 100 nF. The values of these capacitors can be varied by the customer, depending on the application. During mode change from Silent to Normal mode, the voltage regulator ramps up to 6V for only a few microseconds before it drops back to 5V. This behavior depends on the value of the load capacitor. With 4.7 F, the overshoot voltage has its greatest value. This voltage decreases with higher or lower load capacitors. With this special SO8 package (fused lead frame to pin3) an Rthja of 100 K/W is achieved. Therefore it is recommended to connect pin 3 with a wide GND plate on the printed board to get a good heat sink. The main power dissipation of the IC is created from the VCC output current IVCC , which is needed for the application. Figure 6-1 shows the safe operating area of the ATA6620. Figure 6-1. Save Operating Area versus VCC Output Current and Supply Voltage VS at Different Ambient Temperatures
60.00 IOUT, Tamb = 85C 50.00
IVCC/mA
40.00 IOUT, Tamb = 105C
30.00
20.00 IOUT, Tamb = 95C
10.00
0.00 5 6 7 8 9 10 11 12 13 14 15 16 17 18
VS /V
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7. Absolute Maximum Ratings
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters VS - Continuous supply voltage Logic pins (RxD, TxD, EN, NRES) LIN - DC voltage - Transient voltage VCC - DC voltage ESD (DIN EN 6100-4-2) Pin LIN, VS versus GND according to LIN specification EMC Evaluation V 1.3 HBM ESD S5.1 - all pins CDM ESD STM 5.3.1-1999 - All pins Junction temperature Storage temperature Operating ambient temperature Thermal resistance junction to ambient (free air) Special heat sink at GND (pin 3) on PCB Thermal shutdown of VCC regulator Thermal shutdown of LIN output Thermal shutdown hysteresis Tj Ts Ta Rthja Rthja TVCCoff TLINoff Thys 155 155 165 165 7 Symbol Min. -0.3 -0.3 -40 -150 -0.3 -6 -2 -500 -40 -55 -40 Typ. Max. +40 +6.5 +60 +100 +6.5 +6 +2 +500 +150 +150 +125 145 100 175 175 Unit V V V V V kV kV V C C C K/W K/W C C C
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8. Electrical Characteristics
5V < VS < 18V, Tamb = -40C to 125C No. 1 1.1 Parameters VS Pin Nominal DC voltage range Sleep mode Supply current in Sleep Vlin > VBatt - 0.5V mode VBatt < 14V (25C to 125C) Bus recessive; Supply current in Silent VBatt < 14V mode (25C to 125C) Without load at VCC Supply current in Normal mode Supply current in Normal mode Power On Reset threshold Power On Reset threshold hysteresis VS undervoltage threshold VS undervoltage threshold hysteresis RXD Output Pin Low level input current Normal mode; VLIN = 0V VRXD = 0.4V RXD RXD RXD RXD TXD TXD VTXD = 0V VTXD = 5V TXD TXD IRXD VRXDL VRXDH RRXD VTXDL VTXDH RTXD ITXD 4.2 3 -0.3 3.5 125 -3 250 5 7 +1.5 VCC + 0.3V 600 +3 2 5 8 0.4 mA V V k V V k A A A A A A A A A Bus recessive Without load at VCC Bus dominant VCC load current 50 mA VS VS 5 13.5 18 V A Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
1.2
VS
IVSsleep
10
20
A
A
1.3
VS
IVSsi
40
50
A
A
1.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 3 3.1 3.2 3.3 3.4 4 4.1 4.2 4.3 4.4
VS VS VS VS VS VS
IVSrec IVSdom PORth PORhys VSth VSth_hys 4.0 3 0.1 4.5 0.2
4 55 3.3
mA mA V V
A A D D A A
5
V V
Low level output voltage IRXD = 1 mA High level output voltage IRXD = -1 mA Internal resistor to VCC TXD Input Pin Low level voltage input High level voltage input Pull-up resistor High level leakage current EN Input Pin Low level voltage input High level voltage input Pull-down resistor Low level input current VEN = 5V VEN = 0V
EN EN EN EN
VENL VENH REN IEN
-0.3 3.5 125 -3 250
+1.5 VCC + 0.3V 600 +3
V V k A
A A A A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
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8. Electrical Characteristics (Continued)
5V < VS < 18V, Tamb = -40C to 125C No. 5 5.1 5.2 5.3 5.4 5.5 6 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 7 7.1 7.2 7.3 Parameters NRES Output Pin High level output voltage Low level output voltage Low level output low Undervoltage reset time VS 5.5V; INRES = -1 mA VS 5.5V; INRES = -1 mA 10 k to VCC; VCC = 0.8V VVS 5.5V CNRES = 20 pF NRES NRES NRES NRES NRES VNRESH VNRESL VNRESLL tReset tres_f 7 4.2 0.4 0.2 13 5 V V V ms s A A A A A Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
Reset debounce time for VVS 5.5V falling edge CNRES = 20 pF 5.5V < VS < 18V (0 mA - 50 mA) 3.3V < VS < 5.5V (0 mA - 50 mA) VS > 4.0V, IVCC = 20 mA VS > 4.0V, IVCC = 50 mA VS > 3.3V, IVCC = 15 mA VS > 3V ESR < 5 Referred to VCC VS > 5.5V Referred to VCC VS > 5.5V
Voltage Regulator VCC Pin in Normal and Pre-normal Mode Output voltage VCC Output voltage VCC at low VS Regulator drop voltage Regulator drop voltage Regulator drop voltage Output current Load capacity VCC undervoltage threshold Hysteresis of undervoltage threshold VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCnor VCClow VD VD VD IVCC IVCCs Cload VthunN Vhysthun tVCC -50 -200 1.8 4.4 40 1 2 -130 2.2 4.8 4.9 VVS - VD 5.1 5.1 250 500 200 V V mV mV mV mA mA F V mV ms A A A A A A A A A A A
Output current limitation VS > 0V
Ramp up time VS > 5.5V CVCC = 2.2 F to VCC > 4.9V Rload at VCC: 100 Voltage Regulator VCC Pin in Silent Mode Output voltage VCC Output voltage VCC at low VS Regulator drop voltage At VCC undervoltage threshold the state switches back to Pre-normal mode Hysteresis of undervoltage threshold 5.5V < VS < 18V (0 mA - 50 mA) 3.3V < VS < 5.5V (0 mA - 50 mA) VS > 3.3V, IVCC = 15 mA Referred to VCC VS > 5.5 Referred to VCC VS > 5.5V
VCC VCC VCC
VCCnor VCClow VD VthunS
4.65 VVS - VD
5.35 5.1 200
V V mV
A A A
7.4
VCC
3.9
4.4
V
A
7.5 7.6
VCC VCC
Vhysthun IVCCs
40 -200 -130
mV mA
D A
Output current limitation VS > 0V
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
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8. Electrical Characteristics (Continued)
5V < VS < 18V, Tamb = -40C to 125C No. 8 Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* LIN Bus Driver: Bus Load Conditions: Load 1 (Small): 1 nF, 1 k; Load 2 (Large): 10 nF, 500; RRXD = 5 k; CRXD = 20 pF 10.5, 10.6 and 10.7 Specifies the Timing Parameters for Proper Operation at 20 Kbps Driver recessive output voltage Driver dominant voltage Driver dominant voltage Driver dominant voltage Driver dominant voltage Pull-up resistor to VS Self-adapting current limitation VBUS = VBatt_max Input leakage current at the receiver including pull-up resistor as specified Leakage current LIN recessive Leakage current when control unit disconnected from ground. Loss of local ground must not affect communication in the residual network VTXD = 0V; ILIN = 0 mA VVS = 7.3V Rload = 500 VVS = 18V Rload = 500 VVS = 7.3V Rload = 1000 VVS = 18V Rload = 1000 The serial diode is mandatory Tj = 125C Tj = 27C Tj = -40C Input Leakage current Driver off VBUS = 0V VBatt = 12V Driver off 8V < VBatt < 18V 8V < VBUS < 18V VBUS VBatt LIN LIN LIN LIN LIN LIN VBUSrec V_LoSUP V_HiSUP V_LoSUP_1k V_HiSUP_1k RLIN IBUS_LIM 0.6 0.8 20 52 100 150 30 60 110 170 230 0.9 x VS VS 1.2 2 V V V V V k mA mA mA A A A A A A
8.1 8.2 8.3 8.4 8.5 8.6
8.7
LIN
A
8.8
LIN
IBUS_PAS_dom
-1
mA
A
8.9
LIN
IBUS_PAS_rec
15
20
A
A
8.10
GNDDevice = VS VBatt = 12V 0V < VBUS < 18V
LIN
IBUS_NO_gnd
-10
+0.5
+10
A
A
8.11
Node has to sustain the current that can flow VBatt disconnected under this condition. VSUP_Device = GND Bus must remain 0V < VBUS < 18V operational under this condition
LIN
IBUS
0.5
3
A
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
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8. Electrical Characteristics (Continued)
5V < VS < 18V, Tamb = -40C to 125C No. 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 10 10.1 Parameters LIN Bus Receiver Center of receiver threshold VBUS_CNT = (Vth_dom + Vth_rec)/2 LIN LIN LIN LIN LIN ILIN = typically -3 mA VS < 27V LIN LIN VBUS_CNT VBUSdom VBUSrec VBUShys VLINH VLINL ILIN 0.475 x VS -27 0.6 x VS 0.028 x VS VS - 1V -27 -30 -10 0.1 x VS 0.5 x VS 0.525 x VS 0.4 x VS 40 0.175 x VS VS + 0.3V VS - 3V V V V V V V A A A A A A A A Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
Receiver dominant state VEN = 5V Receiver recessive state VEN = 5V Receiver input hysteresis Wake detection LIN High level input voltage Wake detection LIN Low level input voltage LIN pull-up current Internal Timers Dominant time for wake-up via LIN bus VLIN = 0V Vhys = Vth_rec - Vth_dom
tbus
30
90
150
s
A
10.2
Time delay for mode change from Pre-normal VEN = 5V into Normal mode via pin EN Time delay for mode change from Normal V = 0V mode to Sleep mode via EN pin EN TXD dominant time out timer VTXD = 0V THRec(max) = 0.744 x VS; THDom(max) = 0.581 x VS; VS = 7.0V to 18V; tBit = 50 ms D1 = tbus_rec(min)/(2 x tBit) THRec(min) = 0.422 x VS; THDom(min) = 0.284 x VS; VS = 7.0V to 18V; tBit = 50ms D2 = tbus_rec(max)/(2 x tBit)
tnorm
1
5
10
s
A
10.3
tsleep
2
7
12
s
A
10.4
tdom
5
10
20
ms
A
10.5
Duty cycle 1
D1
0.396
A
10.6
Duty cycle 2
D2
0.581
A
10.7 11 11.1
Slope time falling and rising edge at LIN
tSLOPE_fall tSLOPE_rise
3.5
22.5
s
A
Receiver Electrical AC Parameters of the LIN Physical Layer LIN Receiver, RXD Load Conditions (CRXD): 20 pF; Rpull-up = 2.4 k Propagation delay of receiver Figure 4-4 trec_pd = max(trx_pdr, trx_pdf) trx_pd trx_sym -2 6 s A
11.2
Symmetry of receiver propagation delay rising trx_sym = trx_pdr - trx_pdf edge minus falling edge
+2
s
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
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Figure 8-1.
Definition of Bus Timing Characteristics
tBit tBit tBit
TXD (Input to transmitting Node)
tBus_dom(max)
tBus_rec(min)
THRec(max) VS (Transceiver supply of transmitting node) THDom(max) LIN Bus Signal THRec(min) THDom(min)
Thresholds of receiving node 1
Thresholds of receiving node 2
tBus_dom(min)
tBus_rec(max)
RXD (Output of receiving Node1) trx_pdf(1) trx_pdr(1)
RXD (Output of receiving Node2) trx_pdr(2) trx_pdf(2)
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Figure 8-2. Application Circuit
VCC RXD 5
ATA6620
Receiver
1 Normal and Pre-normal Mode 4 Filter 220 pF VS 100 nF LIN
VBAT 22 F
Microcontroller
LIN-BUS
VCC Wake Up Bus Timer TXD 6 TXD Time-out Timer Slew Rate Control Short-circuit and Overtemperature Protection
8 Sleep Mode VCC Undervoltage Reset Switched Silent Mode Off Voltage Regulator 5V/10% Normal Mode Voltage Regulator 5V/50 mA
VCC
EN
2
Control Unit
7
NRES
GND 3
100 nF
22 F
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9. Ordering Information
Extended Type Number ATA6620-TAQY Package SO8 Remarks LIN System Basis Chip
10. Package Information
Package SO8
Dimensions in mm
5.00 4.85 1.4 0.4 1.27 3.81 8 5 0.25 0.10 0.2 3.8 6.15 5.85 5.2 4.8 3.7
technical drawings according to DIN specifications
1
4
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Atmel Corporation
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600
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4850A-AUTO-02/05

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